Power consumption is becoming a limiting factor in integrated circuits and in particular microprocessors. Currently, some microprocessors can operate at around 100 Watts, which is around the practical limit for simple air cooling. Much of the power dissipation is due to clock drivers, interconnection drivers, and output drivers of complementary metal oxide semiconductor (CMOS) inverters that are required to drive large capacitive loads at high switching speeds. In order to drive large capacitive loads, these drivers include wide devices with large channel width-to-length (W/L) ratios. These drivers have a relatively slow rise time because of the large capacitive loads, such that the rise and fall times of the input and output waveforms are a significant part of the overall period of the waveforms.
An integrated circuit consumes static and dynamic power. Static power refers to the product of the supply voltage and the direct current (DC), including both through current and leakage current. Dynamic power consumption includes capacitive power consumption, which refers to the product of the load capacitance, the square of the supply voltage and the toggle frequency. Low-power designs can include designs to avoid circuits that consume static power, designs to reduce the supply voltage which can have the undesirable effects of lowering transistor output currents and increasing signal delays, designs to reduce capacitance, and designs to reduce signal frequencies. Increased signal delays and lower signal frequencies are undesirable for fast processor and memory operations.
Dynamic power consumption also includes power dissipation from momentary short circuits, referred to as crowbar currents, that occur when a transistor stack switches states and both the p-channel metal oxide semiconductor (PMOS) and n-channel metal oxide semiconductor (NMOS) transistors are temporarily conducting current. Thus, during the switching transient of a CMOS inverter there can be a large DC current, or “crowbar” current down through both the PMOS device and NMOS device when the output is around one half of the power supply voltage. This current does not contribute to switching the capacitive loads and constitutes wasted power.